Implementation of Multiple-Valued Adder and Multiplier Using Current-Mode CMOS
The KIPS Transactions:PartA, Vol. 11, No. 2, pp. 115-122, Apr. 2004
10.3745/KIPSTA.2004.11.2.115, PDF Download:
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Cite this article
[IEEE Style]
S. H. Gyeong, "Implementation of Multiple-Valued Adder and Multiplier Using Current-Mode CMOS," The KIPS Transactions:PartA, vol. 11, no. 2, pp. 115-122, 2004. DOI: 10.3745/KIPSTA.2004.11.2.115.
[ACM Style]
Seong Hyeon Gyeong. 2004. Implementation of Multiple-Valued Adder and Multiplier Using Current-Mode CMOS. The KIPS Transactions:PartA, 11, 2, (2004), 115-122. DOI: 10.3745/KIPSTA.2004.11.2.115.