Min Wook Ahn , Yun Heung Paek , Jeong Hun Cho

The KIPS Transactions:PartA, Vol. 13, No. 4, pp. 275-288, Aug. 2006
10.3745/KIPSTA.2006.13.4.275,   PDF Download:

Abstract

Rapid design space exploration is crucial to customizing embedded system design for exploiting the application behavior. As the time-to-market becomes a key concern of the design, the approach based on an application specific instruction-set processor (ASIP) is considered more seriously as one alternative design methodology. In this approach, the instruction set architecture (ISA) for a target processor is frequently modified to best fit the application with regard to code size and speed. Two goals of this paper is to introduce our new retargetable compiler and how it has been used in ASIP-based design space exploration for a popular digital signal processing (DSP) application. Newly developed retargetable compiler provides not only the functionality of previous retargetable compilers but also visualizes the features of the application program andprofiles it so that it can help architecture designers and application programmers to insert new application specific instructions into target architecture for perfomance increase. Given an initial RISC-style ISA for the target processor, we characterized the application code and incrementally updated the ISA with more application specific instructions to give the compiler a better chance to optimize assembly code for the application. We get 32% performance increase and 20% program size reduction using 6 audio codec specific instructions from retargetable compiler. Our experimental results manifest a glimpse of evidence that a highly retargetable compiler is essential to rapidly prototype a new ASIP for a specific application.

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