A Study on Implementation of Model Checking Program for Verifying LTS Specification


The Transactions of the Korea Information Processing Society (1994 ~ 2000), Vol. 5, No. 4, pp. 995-1004, Apr. 1998
10.3745/KIPSTE.1998.5.4.995,   PDF Download:

Abstract

This paper presents an implementation of model checking tool for LTS process specification, which checks deadlock, livelock and reachability for the state and action. The implemented formal checker using modal mu-calculus is able to verify whether properties expressed in modal logic are true on specifications. We prove experimentally that it is powerful to check, safety and liveness for the state and action on LTS. The tool is implemented by C language and runs on IBM PC under Windows NT.


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Cite this article
[IEEE Style]
P. Y. Bum, K. T. Kyun, K. S. Un, "A Study on Implementation of Model Checking Program for Verifying LTS Specification," The Transactions of the Korea Information Processing Society (1994 ~ 2000), vol. 5, no. 4, pp. 995-1004, 1998. DOI: 10.3745/KIPSTE.1998.5.4.995.

[ACM Style]
Park Yong Bum, Kim Tae Kyun, and Kim Sung Un. 1998. A Study on Implementation of Model Checking Program for Verifying LTS Specification. The Transactions of the Korea Information Processing Society (1994 ~ 2000), 5, 4, (1998), 995-1004. DOI: 10.3745/KIPSTE.1998.5.4.995.