High-Performance Architecture of 4x4/8x8 DCT and Quantization Circuit for Unified Video CODEC


The KIPS Transactions:PartA, Vol. 18, No. 2, pp. 39-44, Apr. 2011
10.3745/KIPSTA.2011.18.2.39,   PDF Download:

Abstract

This paper proposes the new high-performance circuit architecture of the transform and quantization for unified video CODEC. The proposed architecture can be applied to all kinds of transforms and quantizations for the video compression standards such as JPEG, MPEG-1/2/4, H.264 and VC-1. We defined the permutation matrices to reorder the transform matrix of the 8x8 DCT and partitioned the reordered 8x8 transform matrix into four 4x4 sub-matrices. The 8x8 DCT is performed by repeating the 4x4 DCT`s based on the reordered and partitioned transform matrices. Since our circuit accepts the transform coefficients from the users, it can be extended very easily to cover any kind of DCT-based transforms for future standards. The multipliers in the DCT circuit are shared by the quantization circuit in order to minimize the circuit size. The quantization circuit is merged into the DCT circuit without any significant increase of circuit resources and processing time. We described the proposed DCT and quantization circuit at RTL, and verified its operation on FPGA board.


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Cite this article
[IEEE Style]
S. Y. Lee and K. S. Cho, "High-Performance Architecture of 4x4/8x8 DCT and Quantization Circuit for Unified Video CODEC," The KIPS Transactions:PartA, vol. 18, no. 2, pp. 39-44, 2011. DOI: 10.3745/KIPSTA.2011.18.2.39.

[ACM Style]
Seon Young Lee and Kyeong Soon Cho. 2011. High-Performance Architecture of 4x4/8x8 DCT and Quantization Circuit for Unified Video CODEC. The KIPS Transactions:PartA, 18, 2, (2011), 39-44. DOI: 10.3745/KIPSTA.2011.18.2.39.