On a Logical Path Design for Optimizing Power-delay under a Fixed-delay Constraint
The KIPS Transactions:PartA, Vol. 17, No. 1, pp. 27-32, Feb. 2010
10.3745/KIPSTA.2010.17.1.27, PDF Download:
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Cite this article
[IEEE Style]
S. H. Lee and J. K. Chang, "On a Logical Path Design for Optimizing Power-delay under a Fixed-delay Constraint," The KIPS Transactions:PartA, vol. 17, no. 1, pp. 27-32, 2010. DOI: 10.3745/KIPSTA.2010.17.1.27.
[ACM Style]
Seung Ho Lee and Jong Kwon Chang. 2010. On a Logical Path Design for Optimizing Power-delay under a Fixed-delay Constraint. The KIPS Transactions:PartA, 17, 1, (2010), 27-32. DOI: 10.3745/KIPSTA.2010.17.1.27.