Computer Graphics & Design of a 64x64-Bit Modified Booth Multiplier Using Current-Mode CMOS Quarternary Logic Circuits
The KIPS Transactions:PartA, Vol. 14, No. 4, pp. 203-208, Aug. 2007
10.3745/KIPSTA.2007.14.4.203, PDF Download:
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Cite this article
[IEEE Style]
J. B. Kim, "Computer Graphics & Design of a 64x64-Bit Modified Booth Multiplier Using Current-Mode CMOS Quarternary Logic Circuits," The KIPS Transactions:PartA, vol. 14, no. 4, pp. 203-208, 2007. DOI: 10.3745/KIPSTA.2007.14.4.203.
[ACM Style]
Jeong Beom Kim. 2007. Computer Graphics & Design of a 64x64-Bit Modified Booth Multiplier Using Current-Mode CMOS Quarternary Logic Circuits. The KIPS Transactions:PartA, 14, 4, (2007), 203-208. DOI: 10.3745/KIPSTA.2007.14.4.203.