Computer Graphics & A Minimal Constrained Scheduling Algorithm for Control Dominated ASIC Design


The Transactions of the Korea Information Processing Society (1994 ~ 2000), Vol. 6, No. 6, pp. 1646-1655, Jun. 1999
10.3745/KIPSTE.1999.6.6.1646,   PDF Download:

Abstract

This thesis presents a new VHDL intermediate format CDDG(Control Dominated Data Graph) and a minimal constrained scheduling algorithm for an optimal control dominated ASIC design. CDDG is a control flow graph which represents conditional branches and loops efficiently. Also it represents data dependency and such constraints as hardware resource and timing. In the proposed scheduling algorithm, the constraints are substituted by subgraphs, and then the number of subgraphs (that is the number of the constraints) is minimized by using the inclusion and overlap relation among subgraphs. The effectiveness of the proposed algorithm has been proven by the experiment with the benchmark examples.


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Cite this article
[IEEE Style]
L. C. Ho, "Computer Graphics & A Minimal Constrained Scheduling Algorithm for Control Dominated ASIC Design," The Transactions of the Korea Information Processing Society (1994 ~ 2000), vol. 6, no. 6, pp. 1646-1655, 1999. DOI: 10.3745/KIPSTE.1999.6.6.1646.

[ACM Style]
Lin Chi Ho. 1999. Computer Graphics & A Minimal Constrained Scheduling Algorithm for Control Dominated ASIC Design. The Transactions of the Korea Information Processing Society (1994 ~ 2000), 6, 6, (1999), 1646-1655. DOI: 10.3745/KIPSTE.1999.6.6.1646.